Booth demos and conference presentations highlight convergence of hardware and software in All Programmable systems enhancing flexibility, performance and design productivity as well as BOM cost and total power
Xilinx, Inc. will demonstrate its Zynq™-7000 Extensible Processing Platform (EPP) and new Vivado Design Suite, as well as presenting two conference papers on FPGA design for software developers and System-on-Chip (SoC) integration at ESC India 2012 from July 18-20, 2012. Xilinx will show visitors how its All Programmable technologies enable flexible, scalable embedded designs for achieving increased system performance and accelerated design productivity.
Xilinx's All Programmable technologies comprise of FPGAs, 3D ICs and SoCs featuring programmable hardware, software and I/O, tightly integrated with best-in-class operating systems, IP and development tools.
What: Embedded Systems Conference India (ESC India) 2012
Where: NIMHANS Convention Centre, Bangalore, stand C7-C8
When: July 18 - 20, 2012
Exhibits: July 18 – 20, 2012
Papers: July 20, 2012
Zynq-7000 SoC
Four demonstrations will highlight the video, graphics and real-time processing capabilities of Xilinx's Zynq-7000 EPP; a new class of device which combines the industry-standard ARM® dual-core Cortex™-A9 MPCore™ processing system with tightly coupled programmable logic, demonstrating that this architecture offers values far beyond just component cost reduction.
The image-processing demonstration, using Linux running in SMP mode on a Zynq-7000 SoC development board, will compare a software-based approach to processing medical CAT-scan images using the dual Cortex-A9 cores, against a hardware-accelerated solution with critical functions performed in programmable logic showing an overall performance gain of over 10x on this image processing algorithm.
With Windows Embedded Compact 7 gaining traction in a wide range of small footprint enterprise and consumer devices, a demonstration based on the work by Adeneo on Zynq-7000 SoC will showcase advanced Qt graphical user framework and multimedia capabilities.
Another demonstration, featuring accelerated HD video processing, will show how the Zynq-7000 device enables a single-chip solution capable of processing a video pipeline in a way that is unachievable using a two-chip solution. Featuring a sobel filter implemented in programmable logic, this IP core is interconnected with the dual Cortex-A9 processing system. This demonstration will show how computationally intensive tasks can be offloaded seamlessly in programmable logic to maximize system performance and functionality while reducing power consumption.
The final application-focused Zynq-7000 EPP demonstration will feature the device as an asymmetric multi-processing engine using the two Cortex-A9 cores. Utilizing technology by Xilinx Alliance Program member, Petalogix, and running Linux side-by-side with FreeRTOS for tasks requiring low-latency response, this demonstration will show how comprehensive support for both open-source and commercial operating systems enables Zynq-7000 devices to fulfill a wide range of industrial applications.
Vivado Design Suite
In addition, Xilinx will showcase its Vivado Design Suite, a completely new design environment built from the ground up to accelerate design productivity, scale to support high-capacity programmable devices at 28nm and beyond, and provide features for programmable systems integration.
Xilinx will show how the Vivado Design Suite integrated design environment with its shared scalable data model facilitates a new IP centric design approach with progressive area and power estimates and cross-probing at all levels. Xilinx will also demonstrate its unique High-Level synthesis tool built on AutoESL™ tool technology, Vivado HLS, which accelerates design implementation and verification by enabling C,C++, and SystemC specifications to be directly synthesized into VHDL or Verilog RTL, after exploring a multitude of micro-architectures based on design requirements. Designers and system architects will see on the Xilinx booth a faster and more robust way of delivering quality designs.
Xilinx, Inc. will demonstrate its Zynq™-7000 Extensible Processing Platform (EPP) and new Vivado Design Suite, as well as presenting two conference papers on FPGA design for software developers and System-on-Chip (SoC) integration at ESC India 2012 from July 18-20, 2012. Xilinx will show visitors how its All Programmable technologies enable flexible, scalable embedded designs for achieving increased system performance and accelerated design productivity.
Xilinx's All Programmable technologies comprise of FPGAs, 3D ICs and SoCs featuring programmable hardware, software and I/O, tightly integrated with best-in-class operating systems, IP and development tools.
What: Embedded Systems Conference India (ESC India) 2012
Where: NIMHANS Convention Centre, Bangalore, stand C7-C8
When: July 18 - 20, 2012
Exhibits: July 18 – 20, 2012
Papers: July 20, 2012
Zynq-7000 SoC
Four demonstrations will highlight the video, graphics and real-time processing capabilities of Xilinx's Zynq-7000 EPP; a new class of device which combines the industry-standard ARM® dual-core Cortex™-A9 MPCore™ processing system with tightly coupled programmable logic, demonstrating that this architecture offers values far beyond just component cost reduction.
The image-processing demonstration, using Linux running in SMP mode on a Zynq-7000 SoC development board, will compare a software-based approach to processing medical CAT-scan images using the dual Cortex-A9 cores, against a hardware-accelerated solution with critical functions performed in programmable logic showing an overall performance gain of over 10x on this image processing algorithm.
With Windows Embedded Compact 7 gaining traction in a wide range of small footprint enterprise and consumer devices, a demonstration based on the work by Adeneo on Zynq-7000 SoC will showcase advanced Qt graphical user framework and multimedia capabilities.
Another demonstration, featuring accelerated HD video processing, will show how the Zynq-7000 device enables a single-chip solution capable of processing a video pipeline in a way that is unachievable using a two-chip solution. Featuring a sobel filter implemented in programmable logic, this IP core is interconnected with the dual Cortex-A9 processing system. This demonstration will show how computationally intensive tasks can be offloaded seamlessly in programmable logic to maximize system performance and functionality while reducing power consumption.
The final application-focused Zynq-7000 EPP demonstration will feature the device as an asymmetric multi-processing engine using the two Cortex-A9 cores. Utilizing technology by Xilinx Alliance Program member, Petalogix, and running Linux side-by-side with FreeRTOS for tasks requiring low-latency response, this demonstration will show how comprehensive support for both open-source and commercial operating systems enables Zynq-7000 devices to fulfill a wide range of industrial applications.
Vivado Design Suite
In addition, Xilinx will showcase its Vivado Design Suite, a completely new design environment built from the ground up to accelerate design productivity, scale to support high-capacity programmable devices at 28nm and beyond, and provide features for programmable systems integration.
Xilinx will show how the Vivado Design Suite integrated design environment with its shared scalable data model facilitates a new IP centric design approach with progressive area and power estimates and cross-probing at all levels. Xilinx will also demonstrate its unique High-Level synthesis tool built on AutoESL™ tool technology, Vivado HLS, which accelerates design implementation and verification by enabling C,C++, and SystemC specifications to be directly synthesized into VHDL or Verilog RTL, after exploring a multitude of micro-architectures based on design requirements. Designers and system architects will see on the Xilinx booth a faster and more robust way of delivering quality designs.
